DS1374C-3#【PDF 6/18 页】IC RTC I2C W/CHARGER 16-SOIC

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DS1374

I2C, 32-Bit Binary Counter Watchdog RTC with

Trickle Charger and Reset Input/Output

____________________________________________________________________

I2C Serial Data Bus

The DS1374 supports the I2C bus protocol. A device

that sends data onto the bus is defined as a transmitter

and a device receiving data is a receiver. The device

that controls the message is called a master. The

devices that are controlled by the master are slaves. A

master device that generates the serial clock (SCL),

controls the bus access, and generates the START and

STOP conditions must control the bus. The DS1374

operates as a slave on the I2C bus. Connections to the

bus are made through the open-drain I/O lines SDA

and SCL. A standard mode (100kHz max clock rate)

and a fast mode (400kHz max clock rate) are defined

within the bus specifications. The DS1374 works in both

modes.

The following bus protocol has been defined (Figure 8):

Data transfer can be initiated only when the bus is

not busy.

During data transfer, the data line must remain sta-

ble whenever the clock line is high. Changes in the

data line while the clock line is high can be interpret-

ed as control signals.

STOP

CONDITION

OR REPEATED

START

CONDITION

REPEATED IF MORE BYTES

ARE TRANSFERED

ACK

START

CONDITION

ACK

ACKNOWLEDGEMENT

SIGNAL FROM RECEIVER

ACKNOWLEDGEMENT

SIGNAL FROM RECEIVER

SLAVE ADDRESS

MSB

SCL

SDA

R/W

DIRECTION

BIT

3–7

Figure 8. I2C Data Transfer Overview

BIT 7

TCS3

1 OF 16 SELECT

NOTE: ONLY 1010b

ENABLES CHARGER

1 OF 2

SELECT

VCC

VBACKUP

250

TCS0-3 = TRICKLE CHARGER SELECT

DS0-1 = DIODE SELECT

TOUT0-1 = RESISTOR SELECT

1 OF 3

SELECT

BIT 6

TCS2

BIT 5

TCS1

BIT 4

TCS0

BIT 3

DS1

BIT 2

DS0

BIT 1

ROUT1

BIT 0

ROUT0

Figure 7. Programmable Trickle Charger

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